Fail safe signal processing techniques using microprocessors and application to design and development of route interlocking system for railways

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dc.contributor.advisorChandra, Vinod
dc.contributor.authorVerma, M.R.
dc.date.accessioned1999-08-23
dc.date.accessioned2024-10-29T11:15:38Z
dc.date.issued1987
dc.identifier.urihttp://10.17.50.146:4000/handle/123456789/3043
dc.relation.ispartofseriesTH1486
dc.subjectCommunication Theory
dc.titleFail safe signal processing techniques using microprocessors and application to design and development of route interlocking system for railways
dc.typeThesis

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